Description
现代集成电路(Integrated Circuit,C)的快速发展使得片.上系统(System on Chip,SoC)设计层次和系统复杂度日益攀升,
而设计层次和系统复杂度的提高则大大增加了验证环节的工作量，验证环节占据了SoC设计工作约50%~ 80%的时间和资
源。验证效率将直接影响芯片的性能指标与设计周期,找到-种先进有效的验证方法成为SoC芯片设计成功的关键。通用
验证方法学(Universal Verification Methodologhy,.UVM)继承了验证方法学手册(Verification Methodology
Manual,VMM)和开源验证方法学(Open Verification Methodology,OVM)的优点克服两者缺点,是目前具有最好兼容
性和最先进工作机制的验证方法学，代表了验证方法学的发展方向。
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